Lab Power Supply - Pre-regulator

So I did some more work on the design of the pre-regulator circuit to try and increase the maximum voltage on the bulk capacitor. I also breadboarded part of the line synchronous ramp circuit which lead to a curios surprise.

The Problem with Voltage Doublers

So I got the comparators in the mail from RS and decided I would build the circuit that detects when the AC voltage goes to near zero. I haven't added the output diode, resistor and capacitor but just looked at the comparator output on the scope.

The circuit basically works except that I found there was a problem with the AC signals. Here is how it looked on the scope.

The blue and red traces are the AC1 and AC2 lines coming in. The yellow trace is the output of the comparator. As you can see it is going low when both AC signals are within one diode drop of zero (as it should) however what happened to the AC signals? They shouldn't be overlapping!

I checked the phasing of the transformer windings, and scratched my head for a while.

Eventually I decided it must have something to do with the voltage double. I removed the voltage doubler circuit and temporarily connected the gate bias regulator to the output of the capacitor (so the MOSFET gate and op amps are running at 36V generated off the main capacitor). Now the traces look as I expect!

(The green trace is the output voltage AC coupled).

I experimented with a couple more voltage doubler circuits and I emailed Peter Oakes who was extremely helpful. He had a very good idea which is instead of trying to generate the gate bias using a voltage doubler I could add another winding to the transformer. The transformers are toroidal so this is a relatively straight forward process.

I haven't tried this but will report back when I do!

Pre-regulator design

The problem with the pre-regulator is that I can't seem to get the voltage above around 33V (or the bottom of the ripple at 3A much above 30). This might be Ok but when I switch to the 15V configuration at 5A I would be lucky to get 10V out of the system.

My thought was that it was to do with the SCR drop or the SCR turning on late. I thought if I could replace it with a MOSFET transistor that is fully saturated it would work better.

I tried using the SCR to generate the voltage for the MOSFET and while I got this to work (in simulation) it had the same problem. I figured the SCR was still the limiter.

If I just drive the MOSFET from the comparator then what happens is the MOSFET will switch on and off as the voltage rises above and falls below the ramp. This will generate considerable noise and dissipate lots of power so this is no good. What I need is something that turns the MOSFET on when the firing point is reached and doesn't turn it off again until the AC reaches its zero point.

I was even considering implementing this with digital logic but thought it should be possible to do using transistors. I thought if I configure an NPN and a PNP to latch-up like an SCR does I can trigger this latch from the comparator. Then I can reset the latch using the output of the line-sync comparator which pulls low when the AC goes to zero.

The circuit I came up with was this:

So when the Fire signal goes high, it turns on Q2 which starts drawing current through Q3's base. This causes a current to flow through R2 so even when the Fire signal goes low it keeps conducting and stays latched. I had to add a diode between the Fire signal and Q2's base as otherwise it would turn the latch off. The current flowing through Q2 means the voltage at Q2's emitter goes up and it is the emitter that will drive the MOSFET gate.

Then to turn the latch off the Zero signal pulls Q1's base low which turns off Q3 and which in turn turns off Q2 and pulls the emitter low. Pretty cool huh?

I set the Fire signal to go high at the 90ms mark and then go low again at 100ms. I set the Zero signal to start high and go low at 150ms and then go high again.

Here are the traces of Zero and Fire signals:

Here they are again with the output signal superimposed:

As you can see the output starts high (don't think this matters), goes low when the zero signal goes low and then goes high again when the fire signal goes high. It stays hight until the Zero signal goes low again. This is pretty much what I wanted.

So I integrated this into the pre-regulator circuit (sorry its a bit ugly)

And actually it doesn't work that well! First of all, when the MOSFET turns on it charges the capacitor quite fast which means the output is quite peaky. I'm not sure why the op amp isn't adjusting the firing angle later but I think it just charges too fast.

In the trace above the capacitor voltage is green, the AC inputs are blue and red, the light blue ( V(n012) is the firing signal from U1. You can see it fires late the first couple of times and then earlier which over-charges the capacitor so then it doesn't fire again until much later and so on. Very chaotic.

The second thing is that when I set the desired output to max, the capacitor voltage is still too low!

Ok so at this point I'm a bit stumped. I tried increasing the gate bias voltage but this doesn't change much. I tried going back to the SCR design and replacing two of the diodes in the bridge rectifier with SCRs. This did help a bit but not much.

I had a thought however and that is the pre-regulator is only really useful at voltages below the maximum. At the maximum voltage we don't need it. I think what I will do is add a relay that basically shorts out the pre-regulator if you set the supply voltage to anything above about 28V in 30V mode or above 10 in 15V mode. This will still limit the dissipation on the MOSFET sufficiently and gives me the range I need.

I think I will stick with the SCR design. I'll build it up on a breadboard and see how it goes.