Lab Power Supply - Pre-regulator re-visited

A while back I noted some odd behaviour in the pre-regulator when the load is current is switching at 10Hz or less and the power supply is going in and out of current limit. Then more recently I noted a fault with the summing amplifier where it was effecting the current measurement and voltage measurement. While working on the current measurement I noted another fault which is that if the output voltage is driven really low (say if you set the output current to 50mA and connect a dummy load trying to suck amps) the pre-regulator can drive the voltage right down to zero and lock-up the supply.

So I thought it was time to re-visit the pre-regulator design.

Current Affecting Voltage

For a while now I have been chasing problems where the output voltage would dip with the current increased. The problem is that there were multiple reasons for this. One reason is that the ground points were not correctly placed so the larger currents created voltage differences across some conductors which then lead to ground voltage differences across the circuit. I tracked down a few of these in the PCBs already.

I also had problems with poor connections between the sense and output voltage lines causing issues. On top of this there is a 1mV or so drop across the binding posts under more than 1.5A of load.

Earlier I realized that the input impedance of my differential voltage amplifier was too low and was affecting the readings.

The latest problem is that the summing amplifier in the pre-regulator ties together the Vout and Iout lines using 10K resistors. This is enough for the output voltage to affect the current reading by a few mV and for the current reading to affect the voltage reading by a few mV.

So now I have added buffers between the current monitor and the summing amplifier (I have a spare op amp in one of the chips). In the final design I will also add another op amp to the board for the second buffer.

Pulsed Current Limit Load

This was pretty hard to reproduce in the simulator but easy to see on the scope. Here is a shot of the output voltage and capacitor voltage that I took before:

You can see the capacitor voltage has dropped and so the output voltage can't get back to the set voltage before the load hits again (which drives the output voltage low again). The worst part of this is that the output will slowly slew from a state where it is outputting the set-voltage at the peaks then down again.

The problem is that the pre-regulator compares the output voltage with the capacitor voltage at the instant that the capacitor is charging (as the next 100Hz pulse from the bridge is coming in). If this happens to be at a point where the output voltage is low because the supply is in current limit then the capacitor won't be charged to a level sufficient to provide the set-voltage.

I was thinking that what I really want is for the desired capacitor voltage to increase quickly to meet demand but to decrease slowly. 

The solution was to add a peak-detect circuit to the output of the summing amplifier so the pre-regulator set-point moves down slowly enough that it won't get caught short when the load is switching on and off at a slow rate. The peak detect has to be fast enough that it will eventually bring the pre-regulator set-point back down to limit heat dissipation on the pass transistor. I chose to make the time constant about 1 second which seemed to work quite well. Here is what the pre-regulator looks like with this added

.

This worked very well. The pulsed load issue went away entirely with a 50Hz pulsed load (the lowest frequency I can do with my dummy load). 

The only issue is that under extreme conditions it will create a significant heat load. I set the output for 25V, the current limit for 2.5A and the dummy load to draw 3.9A in pulses at 50Hz. This creates a close to optimally bad load as the capacitor voltage is over 25V, the output voltage drops to a very small voltage but 2.5A is flowing. The pass transistor got pretty warm but was well within safe limits after a few minutes of operation (I still have problems with the bridge rectifier over-heating so can't test for too long).

Pre-Regulator Lock-up

I wanted to see how accurate the current measurement and current limiting was at very low currents. I set the current limit to 50mA and enabled my dummy load. The output voltage quickly fell down to somewhere in the mVs but then something odd happened - it fell to zero and so did the output current.

I tried this out in LTSPICE and I was able to reproduce it:

This took some time to figure out but the problem is that to keep the pre-regulator 4V above the output, it uses a zener diode to subtract this voltage from the capacitor voltage and compare the subtracted voltage with the output required. As the output drops below 4V (the zener voltage) the zener diode is no longer in breakdown and so the voltage is less than 4V below the output.

If the output voltage is very low then the pre-regulator can drive itself down to a point where the capacitor falls to zero and then the output is zero so it never turns back on!

Once I had a handle on what was going on I decided to peg the minimum voltage to something sensible. With the peak-detector in place I can add another diode to form a sort of diode-or with another voltage which will become the minimum pre-regulator voltage. To begin with I set the minimum to be 4V but then the pre-regulator will hold at 8V as it subtracts 4V from the output before comparing. In the end I added two diodes in series to create the minimum voltage (which gets droped to one diode voltage because of the diode-or) but this worked a treat. Now the minimum pre-regulator voltage is roughly 4V.

Here is the circuit with the minimum voltage setting.

This worked in simulation. The pre-regulator then behaved more like this:

When I tried this on the PCB it worked similarly. The new circuit had no effect at higher voltages and prevented the lock-up. I think this pretty much concludes my work on the pre-regulator! It works!

Next

At this point I think it is time to re-spin the board to fix all the issues I found. The next phase will be to re-integrate all of these changes into the KiCAD design and re-layout the board.